JP1 Remotes

The Reset line in the JP1 EEPROM interface holds the remote's CPU reset while the EEPROM chip is being accessed. This is done to prevent a collision where both would try to access it at the same time. It also holds the CPU port pins in a tri-state condition so there won't be contention (two devices ...

Hello!

Firstly say that I am very grateful to all those who have contributed to this site, as I have finally managed to solve a tricky problem with your help. I also have a technical question for you.

I'll ask the technical question first, as most of you will not be interested in the finer details ...